Out-of-tree build makefile without automake? -

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consider following dead-simple makefile:

foo: foo.c     $(cc) $(cflags) -o $@ $<

and following directory structure ~/foo:

makefile foo.c

how can adjust makefile such can like:

/tmp$ make -f ~/foo/makefile cc -o foo /home/me/foo/foo.c

i have tried use $(srcdir), seems automake-specific. there other similar variable?

this it:

foo: /home/me/foo/foo.c     $(cc) $(cflags) -o $@ $<

or this:

foo: foo.c     $(cc) $(cflags) -o $@ $<  vpath %.c /home/me/foo

or, if don't want hard-code path makefile:

foo: foo.c     $(cc) $(cflags) -o $@ $<  vpath %.c $(dir $(lastword $(makefile_list)))

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